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Cadence Design Systems, Inc.: TSMC and Cadence Expand Collaboration to Deliver Advanced, Feature-Rich Process Design Kits

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^{Published in Science and Technology on Thursday, July 23rd 2009 at 13:09 GMT, Last Modified on 2009-07-23 13:09:23 by Market Wire}  

SAN JOSE, CA--(Marketwire - July 23, 2009) - Cadence Design Systems, Inc. (NASDAQ: [ CDNS ]), the leader in global electronic design innovation, and Taiwan Semiconductor Manufacturing Company (TSMC) today announced a broad expansion of their collaboration to better enable mutual customers to solve the challenges of their latest custom designs, including RF, mixed-signal and custom digital.

Cadence and TSMC will create solutions for two areas of custom design. First they will collaborate on ways to support and enhance TSMC's recently announced interoperable PDK (iPDK), one of the major pillars of TSMC's Open Innovation Platform™, in the Cadence design environment. Second, they will expand the number of process design kits available at TSMC online (PDKs and future iPDKs) to better enable the advanced analog and mixed-signal design techniques available through Cadence® Virtuoso® 6.1 technology.

"By working closely with Cadence, we can better meet the customer needs for OpenAccess-based PDKs for Virtuoso 6.1 at a variety of process nodes, including our most advanced processes," said S.T. Juang, senior director, Design Infrastructure Marketing at TSMC. "Our collaboration will enable mutual customers to innovate in IC design. With decades of experience building process design kits for custom design, including RF, mixed signal and custom digital, Cadence's collaboration will greatly assist us to enhance the iPDK functionality and to realize the Open Innovation Platform's vision of interoperability."

"In addition to close collaborative efforts with TSMC on Cadence digital implementation, signoff, and low-power solutions, the expanded collaboration marks another major milestone in the relationship between Cadence and TSMC as we work to enable TSMC's Open Innovation Platform," said Chi-Ping Hsu, senior vice president of research and development for the Implementation Group at Cadence. "With hundreds of successful tapeouts going to high volumes of production at almost all mature nodes, from 250 down to now 40 nanometers, plus increasing demand for 28-nanometer technology, Cadence and TSMC are poised to offer unique, proven and cost-effective design solutions to mutual customers."

In conjunction with this expanded relationship, Cadence will enhance its support for TSMC's Open Innovation Platform (OIP), which promotes innovation among the semiconductor design community, its ecosystem partners and TSMC's portfolio of products and services.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at [ www.cadence.com ].

Cadence, the Cadence logo, and Virtuoso are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.