Virage Logic to Showcase Broad Portfolio of Advanced IP Technology Solutions at DesignCon 2009
FREMONT, Calif.--([ BUSINESS WIRE ])--Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted IP partner, today announced that it will be exhibiting its advanced intellectual property (IP) technology in booth #301 at DesignCon 2009, being held at the Santa Clara Convention Center on February 3-4, 2009. The company will also be participating as featured panelists and technical presenters in several sessions at the conference.
As an integral part of the system-on-chip (SoC) design ecosystem, Virage Logic's broad portfolio of silicon proven IP solutions enable foundries, integrated device manufacturers (IDMs) and fabless customers to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume.
The International Engineering Consortium (IEC) has selected Virage Logic's innovative STAR™ Memory System 4.0, as a 2009 DesignVision award finalist in the Semiconductor IP category. The awards ceremony will take place on February 3rd, before the keynote address at DesignCon.
Named as one of EDN Magazine's Hot 100 Electronic Products of 2008, the company will be highlighting its all-digital Intelli™ DDR3 Interface IP, and showcasing a live demo featuring a 1.6 Gigabits-per-second (Gb/s) Intelli DDR3 memory system running on a SoC using the company's Intelli DDR2/3 Controller and Intelli DDR2/3 PHY+DLL and I/O.
DesignCon attendees will be able to meet Virage Logic's IP Experts at the following sessions and panels:
Monday, February 2nd– 4:45pm-6:00pm
Technical Panel: How Can Semiconductor Designers meet High Performance/Low Power Requirements for Customers by Providing Greater Choice at Advanced Technology Nodes?
Panelist: Ken Brock, Product Marketing Director, Virage Logic
Tuesday, February 3rd– 11:50am, Main Theater
2009 DesignVision Awards Ceremony
Featured Finalist: STAR Memory System 4.0, Semiconductor IP Category
Tuesday, February 3rd– 3:45pm-5:00pm
Technical Panel: Selecting IP in a Complex Environment
Chairperson: Raghavan Menon, Senior Director Interface IP, Virage Logic
Wednesday, February 4th– 2:50pm-3:30pm
Technical Paper: Using a Memory Access Pattern Test Suite to Predict System Performance
Presenter: Raghavan Menon, Senior Director Interface IP, Virage Logic
Wednesday, February 4th– 3:45-5:00pm
Business Forum Panel: "Globalization of Product Engineering"
Panelist: Brani Buric, Executive Vice President Marketing and Sales, Virage Logic
For more information about DesignCon, visit [ http://www.designcon.com/2009 ].
About Virage Logic
Virage Logic is a leading provider of semiconductor intellectual property (IP) for the design of complex integrated circuits. The company's highly differentiated product portfolio includes embedded SRAMs, embedded NVMs, embedded test and repair, logic libraries, memory development software, and interface IP solutions. As the industry's trusted semiconductor IP partner, foundries, IDMs and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume. For further information, visit [ http://www.viragelogic.com ].
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