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Lattice Seminar Shows How to Cut Power Management Costs up to 50%, Improve Reliability and Reduce Risk

  //science-technology.news-articles.net/content/2 .. p-to-50-improve-reliability-and-reduce-risk.html
  Published in Science and Technology on Tuesday, June 1st 2010 at 1:00 GMT by Market Wire

HILLSBORO, OR--(Marketwire - June 1, 2010) - Lattice Semiconductor Corporation (NASDAQ: [ LSCC ]), as part of its commitment to increase convenience for designers, today announced the free "Power 2 You!" seminar series. Based on the recently released Power 2 You design guide, these seminars describe the design of a variety of power management functions, and show how to integrate them cost effectively into Lattice [ Power Manager II ] devices. These power management solutions can then be individually customized for a wide range of applications using Lattice's PAC-Designer^® software.

The seminars review common power management topics such as power supply sequencing, monitoring, trimming, [ hot-swap ] and power feed. Using integrated programmable threshold comparators, charge pumps, ADCs, DACs, hardware timers and a PLD, the Lattice Power Manager II devices can implement these functions while dramatically decreasing Bill of Material (BOM) costs. The PAC-Designer software tool is used to implement board-level power management functions within the Power Manager II devices. The power management function can then be verified through software simulation for its behavior under faulty power supply conditions. The very low 0.7% threshold error and less than 50uS response times of these devices increase system reliability, while their reprogrammability enables designers to reduce schedule risks due to board re-spins and bug fixes.

"The real world solutions reviewed in this seminar cost substantially less than traditional power management solutions," said Shyam Chandra, Lattice's Mixed Signal Product Marketing Manager and author of Power 2 You. "The designs can be customized using software to suit a wide variety of circuit boards, reducing the number of components required. In addition, designers can simulate for faults and correct their designs before using them in their circuit board, reducing the risks of board re-spins."

The Power 2 You! seminars will be co-hosted by Lattice distribution partners. Locations and additional information can be found on the Lattice website at [ http://www.latticesemi.com/corporate/events ].

About Lattice Semiconductor
Lattice is the source for innovative [ FPGA ], [ PLD ], programmable [ Power Management ] and [ Clock Management ] solutions. For more information, visit [ www.latticesemi.com ]

Lattice Semiconductor Corporation, Lattice (& design), L (& design), PAC-Designer and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.