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Cadence to Showcase Advanced Verification at DVCon 2011


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Published in Science and Technology on Thursday, February 24th 2011 at 5:25 GMT by Market Wire   Print publication without navigation


SAN JOSE CA--(Marketwire - February 24, 2011) - [ Cadence Design Systems ], Inc. (NASDAQ: [ CDNS ]), a leader in global electronic design innovation, will showcase its advanced verification technologies and methodologies at DVCon 2011.

WHEN: Feb. 28 to March 3

WHERE: DoubleTree Hotel, San Jose, Calif.

WHAT: Cadence will offer demos, deliver papers and participate on panels throughout the four-day DVCon 2011, a leading trade show focused on verification. Cadence experts will be available at Booth #1005 to discuss the latest technologies and methodologies supporting the [ EDA360 ] vision.

Members of the Cadence team will participate in:

  • The Feb. 28 "UVM Workshop," held 9 a.m. to 5 p.m. in the Pine/Cedar Ballroom
  • A March 1 panel discussion titled, "UVM -- Final Answer or Phone a Friend?" from 2 p.m. to 3:30 p.m. in the Oak/Fir Ballroom
  • A March 3 Cadence-sponsored tutorial, from 8:30 a.m. to noon in the Siskiyou Ballroom, titled, "Good Fences Don't Make Good Neighbors: A Comprehensive SoC and System Verification and Validation Tutorial"
  • A March 3 luncheon panel, at noon in the Donner Ballroom, titled, "Mixed Signal is No Longer The Other Guy's Problem"

Additional sessions with Cadence-contributed content are:

March 1

  • Session 2.4: Mixed-Signal Approaches in Assertion-based Verification: New Frontiers
  • Session 3.4: UVM-MS: Metrics-driven Verification of Mixed Signal Designs
  • Session 5.2: Transaction Based Acceleration -- Strong Ammunition in Any Verification Arsenal
  • Poster Session 2P.2: Case Study: Power-aware IP and Mixed Signal Verification
  • Poster Session 2P.3: Case Study: Low-power Verification Success Depends on Positive Pessimism

March 2

  • Session 7.3: Optimizing Area and Power Using Formal Methods
  • Session 11.3: An Automatic Visual System Performance Stress Test for TLM Designs

Additional details are available at the [ DVCon 2011 ] web site.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at [ www.cadence.com ].

Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc., in the United States and other countries. All other marks and names are the property of their respective owners


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