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Cadence Incisive Enterprise Simulator Improves Low-Power Verification Productivity by 30%


//science-technology.news-articles.net/content/2 .. s-low-power-verification-productivity-by-30.html
Published in Science and Technology on Tuesday, May 7th 2013 at 6:15 GMT by Market Wire   Print publication without navigation


May 07, 2013 09:00 ET

Cadence Incisive Enterprise Simulator Improves Low-Power Verification Productivity by 30%

SAN JOSE, CA--(Marketwired - May 7, 2013) - Cadence Design Systems, Inc. (NASDAQ: [ CDNS ])

HIGHLIGHTS:

  • Incisive SimVision debug enhancements for visualization of power intent and simulation increase productivity
  • New version delivers low-power usability enhancements and improvement in simulation performance
  • Delivers enhanced CPF support, and extends support for IEEE 1801

Cadence Design Systems, Inc. (NASDAQ: [ CDNS ]), a leader in global electronic design innovation, today introduced a new version of Incisive® Enterprise Simulator, with features that improve low-power verification productivity of complex SoCs by 30 percent. The 13.1 release of Cadence® Incisive Enterprise Simulator addresses low-power verification challenges for advanced modeling, debug, power format support and to provide faster verification for today's most complex SoCs.

The new debug features in Incisive SimVision Debugger provide simple visualization and interactive debug of both complex text-based power intent standards. Other simulator enhancements include additional SystemVerilog support and faster elaboration to turn around simulation jobs much more quickly. Enhanced support for CPF and newly added support of IEEE 1801 will make these enhancements available to all low-power engineers.

"We successfully ran the Unified Power Format (IEEE 1801 / UPF) simulation with the Incisive Enterprise Simulator to identify power domains, verify isolation, and more," said David Vincenzoni, R&D design manager at STMicroelectronics. "The tool works well and we applaud Cadence for adding the new advanced verification capabilities and IEEE 1801 support that will help speed the completion of our low-power SoCs."

"As power demands grow with chip complexity, new low-power verification capabilities are required to adequately validate designs before they head to implementation," said Dr. Chi-Ping Hsu, senior vice president, Silicon Realization Group at Cadence. "The latest release of Incisive Enterprise Simulator features new capabilities that ease the challenge of verifying all of today's power-aware designs."

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at [ www.cadence.com ]. Follow us on Facebook, Twitter, Flicker and Google+.

Cadence, Incisive and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries. All other trademarks are the property of their respective owners.



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