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Tue, November 29, 2011

Cavium's OCTEON(R) II Achieves World's Highest CoreMark Benchmark Score for an Integrated Communications Processor


Published on 2011-11-29 05:55:20 - Market Wire
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November 29, 2011 08:49 ET

Cavium's OCTEON® II Achieves World's Highest CoreMark Benchmark Score for an Integrated Communications Processor

Cavium's Flagship OCTEON II CN68xx Outperforms Alternative High-End Processors on Industry-Standard EEMBC Benchmark for Embedded Applications

SAN JOSE, CA--(Marketwire - Nov 29, 2011) - Cavium, Inc. (NASDAQ: [ CAVM ]), a leading provider of semiconductor products that enable intelligent processing for networking, communications, and the digital home, today announced that its flagship 32 Core OCTEON® II MIPS64 CN6880 processor had achieved a score of over 150,000 on the industry standard Embedded Microprocessor Benchmark Consortium (EEMBC) benchmark in a single chip. This new world leading CoreMark Score of 153,477 is unmatched by any other general purpose communication processor chip with an integrated high performance I/O subsystem capable of delivering over 40Gbps feature-rich, networking application throughput.

The CoreMark benchmark isolates the CPU's core performance from memory and I/O effects and is able to measure meaningful information about a processor's core performance and includes tests of basic pipeline structure, read/write operations, integer operations, control operations including multiply-accumulate (MAC) and single instruction, multiple data (SIMD) instructions, list processing, string search, matrix array multiplication and state-machine processing. Tests are based on information not available at compile time and provides for a more realistic real-world performance metric for embedded processors than some older benchmarks. Higher CoreMark scores allow Cavium OCTEON II processors to address new markets including higher-end control plane, and integrated control and data plane applications that require high single-threaded software performance and has been widely designed into a wide range of flagship products including routers, switches, 3G/4G base-stations, services cards, security gateways and appliances, storage networking and mobile core infrastructure equipment.

The OCTEON II family incorporates Cavium's custom cnMIPS cores and utilizes an innovative high-performance cross-bar for access to a unified L2 cache, which benefits high performance multi-threaded applications, resulting in substantially lower latency for packet processing. Cavium OCTEON II's performance is also greatly aided by its real cores with dedicated L1 caches and higher cache set associativity as demonstrated by greater cache effectiveness and superior deterministic, low-latency performance.

Cavium's flagship OCTEON II CN6880 processor provides up to 48GHz of industry-leading 64 bit compute power across 32 cores, and provides seamless software compatibility with the full range of OCTEON II processors. Furthermore, OCTEON II processors provide this performance within highly constrained power envelopes providing industry-leading performance per watt. As a result, OCTEON II is becoming the leading choice at multiple Tier 1 OEM customers worldwide.

"The work that EEMBC has done with their industry-standard CoreMark benchmark is helping OEMs objectively compare different processors and the claims of various vendors," said YJ Kim, General Manager, Infrastructure Processor Group, Cavium. "Cavium is pleased to be not only leading the pack in single chip performance for the integrated communications processor space, but also showing significantly better results than other benchmarked high-end communication processors."

OCTEON II CN6880 marks several breakthrough milestones for standards-based multi-core computing technology. Tier-1 customer boards populated with the OCTEON II family are enabling game changing, innovative architectures for next generation networking platforms.

Industry-firsts embodied in the shipping OCTEON II CN6880 32-core single-chip processor include:

  • Highest number of standards-based CPU cores in a single chip: 32 MIPS64 cores
  • Highest number of dedicated hardware acceleration blocks: Over 100
  • Highest compute processing in a single chip: 48 GHz of 64 bit processing
  • Lowest power consumption per GHz of 64 bit processing
  • Highest L2 - L7 Packet Processing including hardware acceleration of packet forwarding, IPsec security, TCP and DPI applications at up to 40+Gbps in a single chip
  • Highest Compression/Decompression performance of up to 20+Gbps in a single chip

EEMBC has made the CoreMark benchmark openly available and it has quickly become a key performance metric for real-world performance testing of embedded processors, ranging from 8-bit microcontrollers to high-end 64-bit multicore devices and architectures.

CoreMark source code and all available scores are available for download from the CoreMark website ([ www.coremark.org ]).

About Cavium, Inc.
Cavium is a leading provider of highly integrated semiconductor products that enable intelligent processing in networking, communications and the digital home. Cavium offers a broad portfolio of integrated, software compatible processors ranging in performance from 10 Mbps to over 40 Gbps that enable secure, intelligent functionality in enterprise, data-center, broadband/consumer and access & service provider equipment. Cavium's processors are supported by ecosystem partners that provide operating systems, tool support, reference designs and other services. Cavium's principal offices are in San Jose, California with design team locations in California, Massachusetts, India, Taiwan and China. For more information, please visit: [ http://www.cavium.com ].

Note on Forward-Looking Statements
This press release may contain forward-looking statements regarding future events that involve risks and uncertainties. Readers are cautioned that these forward-looking statements are only predictions and may differ materially from actual future events or results. These forward-looking statements involve risks and uncertainties, as well as assumptions and current expectations. Our actual results and the timing of events could differ materially from those anticipated in such forward-looking statements as a result of these risks, uncertainties and assumptions. The risks and uncertainties that could cause our results to differ materially from those expressed or implied by such forward-looking statements include but are not limited to the rate at which our new products are adopted; rate of new design wins; technological advances; pricing pressures; general economic conditions; manufacturing difficulties; development of new products and technologies; whether Cavium is successful in marketing its products; and other risks and uncertainties described more fully in our documents filed with or furnished to the Securities and Exchange Commission. More information about these and other risks that may impact Cavium's business are set forth in the "Risk Factors" section of our Form 10-Q filed with the Securities and Exchange Commission on November, 4, 2011. All forward-looking statements in this press release are based on information available to us as of the date hereof and qualified in their entirety by this cautionary statement, and we assume no obligation to revise or update these forward-looking statements.


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